mirror of
https://github.com/citra-emu/citra.git
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149 lines
4.8 KiB
C++
149 lines
4.8 KiB
C++
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/*
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Copyright (c) 2020 Erik Rigtorp <erik@rigtorp.se>
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in all
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copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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*/
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#pragma once
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#include <atomic>
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#include <cassert>
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#include <cstddef>
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#include <stdexcept>
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#include <type_traits> // std::enable_if, std::is_*_constructible
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#include "../common/TracyAlloc.hpp"
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#if defined (_MSC_VER)
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#pragma warning(push)
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#pragma warning(disable:4324)
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#endif
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namespace tracy {
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template <typename T> class SPSCQueue {
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public:
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explicit SPSCQueue(const size_t capacity)
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: capacity_(capacity) {
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capacity_++; // Needs one slack element
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slots_ = (T*)tracy_malloc(sizeof(T) * (capacity_ + 2 * kPadding));
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static_assert(alignof(SPSCQueue<T>) == kCacheLineSize, "");
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static_assert(sizeof(SPSCQueue<T>) >= 3 * kCacheLineSize, "");
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assert(reinterpret_cast<char *>(&readIdx_) -
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reinterpret_cast<char *>(&writeIdx_) >=
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static_cast<std::ptrdiff_t>(kCacheLineSize));
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}
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~SPSCQueue() {
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while (front()) {
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pop();
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}
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tracy_free(slots_);
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}
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// non-copyable and non-movable
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SPSCQueue(const SPSCQueue &) = delete;
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SPSCQueue &operator=(const SPSCQueue &) = delete;
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template <typename... Args>
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void emplace(Args &&...args) noexcept(
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std::is_nothrow_constructible<T, Args &&...>::value) {
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static_assert(std::is_constructible<T, Args &&...>::value,
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"T must be constructible with Args&&...");
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auto const writeIdx = writeIdx_.load(std::memory_order_relaxed);
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auto nextWriteIdx = writeIdx + 1;
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if (nextWriteIdx == capacity_) {
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nextWriteIdx = 0;
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}
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while (nextWriteIdx == readIdxCache_) {
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readIdxCache_ = readIdx_.load(std::memory_order_acquire);
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}
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new (&slots_[writeIdx + kPadding]) T(std::forward<Args>(args)...);
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writeIdx_.store(nextWriteIdx, std::memory_order_release);
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}
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T *front() noexcept {
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auto const readIdx = readIdx_.load(std::memory_order_relaxed);
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if (readIdx == writeIdxCache_) {
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writeIdxCache_ = writeIdx_.load(std::memory_order_acquire);
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if (writeIdxCache_ == readIdx) {
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return nullptr;
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}
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}
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return &slots_[readIdx + kPadding];
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}
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void pop() noexcept {
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static_assert(std::is_nothrow_destructible<T>::value,
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"T must be nothrow destructible");
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auto const readIdx = readIdx_.load(std::memory_order_relaxed);
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assert(writeIdx_.load(std::memory_order_acquire) != readIdx);
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slots_[readIdx + kPadding].~T();
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auto nextReadIdx = readIdx + 1;
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if (nextReadIdx == capacity_) {
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nextReadIdx = 0;
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}
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readIdx_.store(nextReadIdx, std::memory_order_release);
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}
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size_t size() const noexcept {
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std::ptrdiff_t diff = writeIdx_.load(std::memory_order_acquire) -
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readIdx_.load(std::memory_order_acquire);
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if (diff < 0) {
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diff += capacity_;
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}
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return static_cast<size_t>(diff);
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}
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bool empty() const noexcept {
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return writeIdx_.load(std::memory_order_acquire) ==
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readIdx_.load(std::memory_order_acquire);
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}
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size_t capacity() const noexcept { return capacity_ - 1; }
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private:
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static constexpr size_t kCacheLineSize = 64;
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// Padding to avoid false sharing between slots_ and adjacent allocations
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static constexpr size_t kPadding = (kCacheLineSize - 1) / sizeof(T) + 1;
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private:
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size_t capacity_;
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T *slots_;
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// Align to cache line size in order to avoid false sharing
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// readIdxCache_ and writeIdxCache_ is used to reduce the amount of cache
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// coherency traffic
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alignas(kCacheLineSize) std::atomic<size_t> writeIdx_ = {0};
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alignas(kCacheLineSize) size_t readIdxCache_ = 0;
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alignas(kCacheLineSize) std::atomic<size_t> readIdx_ = {0};
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alignas(kCacheLineSize) size_t writeIdxCache_ = 0;
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// Padding to avoid adjacent allocations to share cache line with
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// writeIdxCache_
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char padding_[kCacheLineSize - sizeof(SPSCQueue<T>::writeIdxCache_)];
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};
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} // namespace rigtorp
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#if defined (_MSC_VER)
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#pragma warning(pop)
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#endif
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