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lundump.py: improved instruction operand labeling
- RKs are fully supported - KBx are also supported
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parent
0dbdfc49c6
commit
4d8c78f023
23
lundump.py
23
lundump.py
@ -66,6 +66,10 @@ class ConstType(IntEnum):
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NUMBER = 3,
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STRING = 4,
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_RKBCInstr = [Opcodes.SETTABLE, Opcodes.ADD, Opcodes.SUB, Opcodes.MUL, Opcodes.DIV, Opcodes.MOD, Opcodes.POW, Opcodes.EQ, Opcodes.LT]
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_RKCInstr = [Opcodes.GETTABLE, Opcodes.SELF]
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_KBx = [Opcodes.LOADK, Opcodes.GETGLOBAL]
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class Instruction:
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def __init__(self, type: InstructionType, name: str) -> None:
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self.type = type
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@ -87,20 +91,27 @@ class Instruction:
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regs = ""
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if self.type == InstructionType.ABC:
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A = "%d" % self.A
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B = "%d" % self.B
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C = "%d" % self.C
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# by default, treat them as registers
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A = "R[%d]" % self.A
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B = "R[%d]" % self.B
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C = "R[%d]" % self.C
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# these opcodes have RKs for B & C
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if self.opcode == Opcodes.SETTABLE or self.opcode == Opcodes.EQ or self.opcode == Opcodes.LT:
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if self.opcode in _RKBCInstr:
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B = self.__readRK(self.B)
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C = self.__readRK(self.C)
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elif self.opcode == Opcodes.GETTABLE: # just for C
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elif self.opcode in _RKCInstr: # just for C
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C = self.__readRK(self.C)
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regs = "%s %s %s" % (A, B, C)
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elif self.type == InstructionType.ABx or self.type == InstructionType.AsBx:
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regs = "%d %d" % (self.A, self.B)
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A = "R[%d]" % self.A
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B = "R[%d]" % self.B
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if self.opcode in _KBx:
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B = "K[%d]" % self.B
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regs = "%s %s" % (A, B)
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return "%s : %s" % (instr, regs)
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